Get2Chip
2Patents
0Active
2Granted
20Portfolio score
Filing activity: May 17, 2000 → May 17, 2000
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6470486B1 | Method for delay-optimizing technology mapping of digital logic | Physics | 33 | Expired |
| US6516453B1 | Method for timing analysis during automatic scheduling of operations in the high-level synthesis of digital systems | Physics | 5 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.