Arch D. Robison
22Patents
8h-index
16Co-inventors
72Inventor score
Filing activity: Feb 13, 1995 → Mar 27, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5790866A | Method of analyzing definitions and uses in programs with pointers and aggregates in an optimizing compiler | Physics | 25 | Expired |
| US7624386B2 | Fast tree-based generation of a dependence graph | Physics | 19 | Expired |
| US5710927A | Method of replacing lvalues by variables in programs containing nested aggregates in an optimizing compiler | Physics | 13 | Expired |
| US7120904B1 | Data-flow method for optimizing exception-handling instructions in programs | Physics | 13 | Expired |
| US5805894A | Method inside an optimizing compiler for analyzing assertions and redirecting control flow in programs | Physics | 13 | Expired |
| US6370685B1 | Data-flow method of analyzing definitions and uses of L values in programs | Physics | 11 | Expired |
| US7730491B2 | Fair scalable reader-writer mutual exclusion | Physics | 8 | Active |
| US8127303B2 | Fair scalable reader-writer mutual exclusion | Physics | 8 | Active |
| US9348658B1 | Technologies for efficient synchronization barriers with work stealing support | Physics | 7 | Active |
| US6820253B1 | Method and system for interprocedural analysis with separate compilation | Physics | 7 | Expired |
| US7213242B2 | Run-time behavior preserving partial redundancy elimination | Physics | 6 | Expired |
| US9747108B2 | User-level fork and join processors, methods, systems, and instructions | Physics | 5 | Active |
| US8108867B2 | Preserving hardware thread cache affinity via procrastination | Physics | 3 | Active |
| US7165245B2 | Pruning local graphs in an inter-procedural analysis solver | Physics | 3 | Expired |
| US9760410B2 | Technologies for fast synchronization barriers for many-core processing | Physics | 2 | Active |
| US7257808B2 | System and method to reduce the size of source code in a processing system | Physics | 2 | Expired |
| US10528345B2 | Instructions and logic to provide atomic range modification operations | Physics | 1 | Active |
| US9690552B2 | Technologies for low-level composable high performance computing libraries | Physics | 1 | Active |
| US7062759B2 | Method and system for interprocedural side effect analysis | Physics | 1 | Expired |
| US9507594B2 | Method and system of compiling program code into predicated instructions for execution on a processor without a program counter | Physics | 1 | Active |
| US8468509B2 | Advance trip count computation in a concurrent processing environment | Physics | 0 | Active |
| US8707324B2 | Fair scalable reader-writer mutual exclusion | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.