Inventor · San Jose, CA, US

Chiate Lin

1Patents
1h-index
2Co-inventors
22Inventor score

Filing activity: Jun 20, 2006 → Jun 20, 2006

Most-cited inventions

PatentTitleAreaCited byStatus
US7466160B2 Shared memory bus architecture for system with processor and memory units Electricity 26 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.