Glen Sescila
18Patents
8h-index
23Co-inventors
72Inventor score
Filing activity: Apr 8, 1997 → Sep 8, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5953511A | PCI bus to IEEE 1394 bus translator | Physics | 104 | Expired |
| US7631097B2 | Method and apparatus for optimizing the responsiveness and throughput of a system performing packetized data transfers using a transfer count mark | Electricity | 57 | Active |
| US6425033B1 | System and method for connecting peripheral buses through a serial bus | Physics | 51 | Expired |
| US5875313A | PCI bus to IEEE 1394 bus translator employing write pipe-lining and sequential write combining | Physics | 50 | Expired |
| US6418504B2 | System and method for coupling peripheral buses through a serial bus using a split bridge implementation | Physics | 24 | Expired |
| US6640312B1 | System and method for handling device retry requests on a communication medium | Physics | 15 | Expired |
| US5937175A | PCI bus to IEEE 1394 bus translator employing pipe-lined read prefetching | Physics | 15 | Expired |
| US8307136B2 | Data movement system and method | Physics | 10 | Active |
| US8458371B2 | Peripheral devices integrated into a processing chain | Physics | 5 | Active |
| US11281602B1 | System and method to pipeline, compound, and chain multiple data transfer and offload operations in a smart data accelerator interface device | Physics | 2 | Active |
| US11507274B2 | System and method to use dictionaries in LZ4 block format compression | Electricity | 1 | Active |
| US11422963B2 | System and method to handle uncompressible data with a compression accelerator | Physics | 0 | Active |
| US11507292B2 | System and method to utilize a composite block of data during compression of data blocks of fixed size | Physics | 0 | Active |
| US12307181B2 | Systems and methods for transparent FPGA reconfiguration | Physics | 0 | Active |
| US11829798B2 | System and method to improve data compression ratios for fixed block sizes in a smart data accelerator interface device | Electricity | 0 | Active |
| US12066971B2 | Direct network access by a memory mapped peripheral device for scheduled data transfer on the network | Physics | 0 | Active |
| US12306778B2 | Method and system for extending SDXI to include IP addresses | Physics | 0 | Active |
| US7849210B2 | Optimizing the responsiveness and throughput of a system performing packetized data transfers | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.