Inventor · Woodstock, NY, US

Gregory Salyer

12Patents
10h-index
28Co-inventors
72Inventor score

Filing activity: Jun 20, 1983 → Oct 24, 2003

Most-cited inventions

PatentTitleAreaCited byStatus
US5265232A Coherence control by data invalidation in selected processor caches without broadcasting to processor caches not having the data Physics 96 Expired
US5357608A Configurable, recoverable parallel bus Electricity 34 Expired
US5455831A Frame group transmission and reception for parallel/serial buses Electricity 30 Expired
US5412803A Communications system having plurality of originator and corresponding recipient buffers with each buffer having three different logical areas for transmitting messages in single transfer Electricity 29 Expired
US5509122A Configurable, recoverable parallel bus Electricity 27 Expired
US5267240A Frame-group transmission and reception for parallel/serial buses Emerging Cross-Sectional Technologies 16 Expired
US5548623A Null words for pacing serial links to driver and receiver speeds Electricity 13 Expired
US5455830A Error detection and recovery in parallel/serial buses Electricity 12 Expired
US7552232B2 Speculative method and system for rapid data communications Physics 12 Active
US4635186A Detection and correction of multi-chip synchronization errors Physics 11 Expired
US5418939A Concurrent maintenance of degraded parallel/serial buses Electricity 7 Expired
US5680575A Interconnect failure detection and cache reset apparatus Electricity 5 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.