Jerry R. Burch
5Patents
4h-index
6Co-inventors
46Inventor score
Filing activity: Jul 17, 1998 → Apr 30, 2008
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7904867B2 | Integrating a boolean SAT solver into a router | Physics | 46 | Active |
| US6308299A | Method and system for combinational verification having tight integration of verification techniques | Physics | 32 | Expired |
| US6247163A | Method and system of latch mapping for combinational equivalence checking | Physics | 16 | Expired |
| US7389479B2 | Formally proving the functional equivalence of pipelined designs containing memories | Physics | 5 | Active |
| US7836414B2 | Formally proving the functional equivalence of pipelined designs containing memories | Physics | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.