Joseph Morrell
1Patents
1h-index
4Co-inventors
25Inventor score
Filing activity: Dec 4, 2002 → Dec 4, 2002
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6799309B2 | Method for optimizing a VLSI floor planner using a path based hyper-edge representation | Physics | 9 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.