Inventor · San Jose, CA, US

Kalapi Roy-Neogi

1Patents
1h-index
1Co-inventors
22Inventor score

Filing activity: Nov 12, 1999 → Nov 12, 1999

Most-cited inventions

PatentTitleAreaCited byStatus
US6507938B1 Methods for improving the performance of VLSI layouts designed by a timing driven physical design tool Physics 22 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.