Inventor · San Jose, CA, US

Paul Vyedin

1Patents
1h-index
3Co-inventors
25Inventor score

Filing activity: Feb 20, 2019 → Feb 20, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US10935595B1 Methods for identifying integrated circuit failures caused by asynchronous clock-domain crossings in the presence of multiple modes Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.