Inventor · Saratoga, CA, US

Stan Chapski

1Patents
0h-index
2Co-inventors
16Inventor score

Filing activity: Dec 31, 2007 → Dec 31, 2007

Most-cited inventions

PatentTitleAreaCited byStatus
US7804371B2 Systems, modules, chips, circuits and methods with delay trim value updates on power-up Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.