Electronic apparatus having parallel memory banks
US10001971B2 · kind B2 · utility
4Cited by
16References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2016 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Mar 21, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic apparatus may be provided that includes a processor to perform operations, and a memory subsystem including a plurality of parallel memory banks to store a two-dimensional (2D) array of data using a shifted scheme. Each memory bank may include at least two elements per bank word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.