Memory devices and modules
US10002044B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2015 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Apr 4, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module includes a module error interface, a module data interface, and a plurality of memory device. The module error interface communicates error information a system control path. The module data interface communicates data to and from a main memory path that is separate from the system control path. Each memory device includes a device controller, a device error interface and a device data interface in which the error data interface is separate from the device data interface. Each device controller includes an ECC engine and an ECC controller. The ECC engine corrects an error in data that is read from the corresponding memory device to generate corrected data, generate error information, communicate the error information through the device error interface to the module error interface, and communicate the corrected data through the device data interface to the module data interface. The ECC controller records the error information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.