Region based device bypass in circuit simulation
US10002217B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2014 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Mar 19, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems are disclosed related to region based device bypass in circuit simulation. In one embodiment, a computer implemented method of performing region based device bypass in circuit simulation includes receiving a subcircuit for simulation, where the subcircuit includes a plurality of devices, and determining node tolerance of the plurality of devices. The computer implemented method further comprises for each device in the plurality of devices, determining whether the device has entered into a bypass region using the node tolerance of the plurality of devices, performing model evaluation in response to the device has not entered the bypass region, and skipping model evaluation in response to the device has entered the bypass region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.