Gate drive on array unit, gate drive on array circuit and display apparatus
US10002560B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 5, 2013 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Oct 22, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0267
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate drive on array unit, a gate drive on array circuit and a display device are disclosed. The gate drive on array unit including: a control module configured to output a clock signal under control of a gate driving signal of a previous stage of gate drive on array unit or a start input signal; an output module connected to the control module and configured to output a high voltage signal (VGH) as a gate driving signal of the present stage under control of the clock signal outputted from the control module, and output a low voltage signal under the control of the clock signal outputted from the control module; and a reset module connected to the output module, and configured to reset the gate driving signal of the present stage under the control of a gate driving signal of a next stage of gate drive on array unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.