Semiconductor devices with charge fixing layers
US10002875B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2017 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Mar 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/118
Abstract
A semiconductor device may include gate electrodes and interlayer insulating layers alternately stacked on a substrate, a channel layer penetrating the gate electrodes and the interlayer insulating layers, a gate dielectric layer between the gate electrodes and the channel layer, a filling insulation that fills at least a portion of an interior of the channel layer, a charge fixing layer between the channel layer and the filling insulation and including a high-k material and/or a metal, and a conductive pad connected to the channel layer and on the filling insulation. The conductive pad may be physically separated from the charge fixing layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.