Low-temperature polysilicon thin film transistor array substrate and method of fabricating the same, and display device
US10002889B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 28, 2014 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Oct 28, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/451
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a low-temperature polysilicon thin film transistor array substrate and a method of fabricating the same, and a display device. The array substrate comprises: a substrate; a polysilicon active layer provided on the substrate; a first insulation layer provided on the active layer; a plurality of gates and a gate line provided on the first insulation layer; a second insulation layer provided on the gates; a source, a drain, a data line and a pixel electrode electrically connected with the drain, which are provided on the second insulation layer, the source covers the plurality of gates. The plurality of gates are provided directly below the source, so that the leakage current is reduced and the aperture ratio of panel is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.