Semiconductor structure and manufacturing method thereof
US10008383B2 · kind B2 · utility
0Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2014 |
| Grant date | Jun 26, 2018 |
| Priority date | — |
| Expiry date | Jul 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a semiconductor structure includes a substrate and an epitaxy region that is partially disposed in the substrate. A doping concentration of the epitaxy region increases from a bottom portion to a top portion of the epitaxy region. The present disclosure also provides a method for manufacturing the semiconductor structure, including forming a recess in a substrate; forming an epitaxy region in the recess; and in situ doping the epitaxy region to form a doping concentration profile increasing from a bottom portion to a top portion of the epitaxy region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.