Shared memory switch fabric system and method
US10009293B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2016 |
| Grant date | Jun 26, 2018 |
| Priority date | — |
| Expiry date | Dec 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/25
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method of transferring cells through a router includes writing one or more of the plurality of cells, including a first cell, of a packet from an ingress stream of an ingress writer to a central buffer, storing a packet identifier entry in the first egress reader scoreboard in each of the plurality of egress readers, the packet identifier entry including a packet identifier, a valid bit, a hit bit and a write cell count, wherein the valid bit is configured to indicate that the packet identifier entry is valid, the hit bit is configured to indicate that no cells in the packet have been read from the central buffer and the write cell count equals the number of cells in the packet written to the central buffer, and reading the packet from the central buffer as a function of the packet identifier entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.