System, apparatus and method for securely protecting a processor in transit
US10009339B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2016 |
| Grant date | Jun 26, 2018 |
| Priority date | — |
| Expiry date | Sep 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W12/47
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a processor includes: a first die including at least one processor core to execute instructions and a non-volatile storage to store an identifier to be provisioned into the processor during manufacture; a second die to couple to the first die, the second die including a wireless circuit and a second non-volatile storage; and a wireless interface to couple to the second die to enable wireless communication with a wireless device. The processor may be disabled if the identifier is not stored in the second non-volatile storage. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.