Methods and systems for board level photonic bridges
US10009668B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2015 |
| Grant date | Jun 26, 2018 |
| Priority date | — |
| Expiry date | Dec 1, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2011/005
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
As photonics evolves closer and closer to the electronic processing elements in order to meet the demands of speed, latency of evolving data communications networks and data centers the inventors, rather than seeking direct monolithically integrated CMOS based processing photonic and electronic elements, have established a different route. Namely replace the computer hubs/electrical bridges interconnecting the multiple core logic chipset elements with a photonic bridge. In this manner high risk chip-to-chip photonic point-to-point links are replaced with photonic SOCs that leverage photonics bandwidth density attribute rather than its bandwidth distance attributes. An SOI based Electronic Embedded Photonic Switching Fabric is presented supporting, for example, N×MGb/s interconnections exploiting N channels of MGb/s wherein each channel of exploits S WDM channels of TGb/s. Embodiments of the invention also support high density optical interconnection via vertical grating couplers and multicore fibers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.