Cache management in a stream computing environment that uses a set of many-core hardware processors
US10013355B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2017 |
| Grant date | Jul 3, 2018 |
| Priority date | — |
| Expiry date | Oct 4, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/62
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed aspects relate to cache management in a stream computing environment that uses a set of many-core hardware processors to process a stream of tuples by a plurality of processing elements which operate on the set of many-core hardware processors. The stream of tuples to be processed by the plurality of processing elements which operate on the set of many-core hardware processors may be received. A tuple-processing hardware-route on the set of many-core hardware processors may be determined based on a cache factor associated with the set of many-core hardware processors. The stream of tuples may be routed based on the tuple-processing hardware-route on the set of many-core hardware processors. The stream of tuples may be processed by the plurality of processing elements which operate on the set of many-core hardware processors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.