Patent · US Active

Systems, methods, and devices for parallel read and write operations

US10020034B2 · kind B2 · utility

0Cited by

10References

18Claims

0Family size

Assignee

Cypress Semiconductor Corporation · US

Inventors

Vineet Agrawal · San Jose, US
Roger Bettman · Los Altos, US
Samuel Leshner · Los Gatos, US

Key dates

Filing date	Mar 20, 2017
Grant date	Jul 10, 2018
Priority date	—
Expiry date	Mar 20, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG11C2207/229
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Disclosed herein are systems, methods, and devices for parallel read and write operations. Devices may include a first transmission device coupled to a local bit line and a global bit line associated with a memory unit of a memory array. The first transmission device may be configured to selectively couple the global bit line to the local bit line. The devices may further include a first device coupled to the local bit line and a sense amplifier. The first device may be configured to selectively couple the local bit line to the sense amplifier. The devices may also include a second device coupled to the local bit line and an electrical ground. The second device may be configured to selectively couple the local bit line to the electrical ground.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.