Circuit protection structure and display device having the same
US10020326B2 · kind B2 · utility
0Cited by
1References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2015 |
| Grant date | Jul 10, 2018 |
| Priority date | — |
| Expiry date | Apr 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/451
Abstract
A circuit protection structure applied to a gate driver that is in a display panel (GIP) is provided. The gate driver has a first metal layer, a first isolation layer, a semiconductor layer, a second metal layer, and a second isolation layer. The first metal layer, the first isolation layer, the semiconductor layer, the second metal layer, and the second isolation layer are stacked in sequence. The circuit protection structure includes a protection layer. The protection layer is located on the second isolation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.