Semiconductor device
US10020373B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2017 |
| Grant date | Jul 10, 2018 |
| Priority date | — |
| Expiry date | Mar 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a highly reliable semiconductor device that uses a thick passivation layer. The protective film is formed so as to cover mostly the entire surface of a semiconductor substrate, and is open only in an area of part that is above a metal wiring layer (connection area). The passivation layer includes starting from the bottom side, a first silicon nitride film that includes silicon nitride (Si3N4), a silicon oxide film that includes silicon oxide (SiO2), and an organic film (organic layer) that includes a polyimide. The silicon oxide film and organic film are formed so as to cover the electrode layer (metal wiring layer) except the top of the insulation layer and the connection area, however, the first silicon nitride film is formed only on the insulation layer and not formed on the electrode layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.