Method of manufacturing low temperature poly-silicon array substrate, array substrate, and display panel
US10020382B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2016 |
| Grant date | Jul 10, 2018 |
| Priority date | — |
| Expiry date | Dec 30, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02686
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure proposes a method of manufacturing a low temperature poly-silicon array substrate, an array substrate and a display panel. The method includes: disposing a substrate, and forming a buffer layer on the substrate; depositing first gas mixture and doped ionized gas by using vapor deposition to form a doped amorphous silicon thin film on the buffer layer; depositing second gas mixture by using vapor deposition to dehydrogenate the amorphous silicon thin film; performing an annealing treatment to the amorphous silicon thin film being dehydrogenated to diffuse dopant ions so as to form a polysilicon layer; and patterning the polysilicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.