Patent · US Active

Scaleable DLL clocking system

US10020813B1 · kind B1 · utility

2Cited by

5References

20Claims

0Family size

Assignee

MICROSOFT TECHNOLOGY LICENSING, LLC · US

Inventors

Richard McCauley · Sunnyvale, US
Barry Thompson · Menlo Park, US
Stefan Wurster · Livermore, US

Key dates

Filing date	Aug 1, 2017
Grant date	Jul 10, 2018
Priority date	—
Expiry date	Aug 1, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH03K5/135
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A clocking system disclosed herein includes a delay locked loop (DLL) circuit with a plurality of delay elements, where the DLL circuit is configured to receive a clock input signal and generate a plurality of clock output signals. The clocking system also includes a feed-forward system configured to increase the speed of the clock signal transmission through the delay elements and to enforce symmetric zero crossings of the clock signal at each of the plurality of delay elements.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.