Systems and methods for fast delta sigma modulation using parallel path feedback loops
US10020818B1 · kind B1 · utility
8Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2017 |
| Grant date | Jul 10, 2018 |
| Priority date | — |
| Expiry date | Mar 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/006
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An error feedback system for a delta sigma modulator is disclosed. The error feedback system has an error transfer function where at least k−1 coefficients are set to zero. This allows the error feedback system to be divided into k feedback paths that are performed in parallel at a clock speed that is 1/k of the system clock of the delta sigma modulator (i.e. the rate at which the output of the delta sigma modulator changes).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.