Display panel with conductive lines under thin-film transistors
US10025413B2 · kind B2 · utility
4Cited by
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20Claims
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Key dates
| Filing date | Aug 31, 2015 |
| Grant date | Jul 17, 2018 |
| Priority date | — |
| Expiry date | Feb 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04103
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A touch recognition enabled display panel includes a plurality of common electrode blocks serving as touch-sensing regions and/or touch-driving regions. Conductive lines connected to the common electrode blocks are placed under the common electrode blocks and the pixel electrodes of the pixels, and they are routed across the active area, directly toward an inactive area where drive-integrated circuits are located. The conductive lines are positioned under one or more planarization layers, and are connected to the corresponding common electrode blocks via one or more contact holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.