Semiconductor device and method of fabricating the same
US10026688B2 · kind B2 · utility
3Cited by
32References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2017 |
| Grant date | Jul 17, 2018 |
| Priority date | — |
| Expiry date | Aug 31, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/797
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a gate electrode on the substrate, an insulating layer on the gate electrode, first and second lower vias in the insulating layer, first and second lower metal lines provided on the insulating layer and respectively connected to the first and second lower vias, and first and second upper metal lines provided on and respectively connected to the first and second lower metal lines. When viewed in a plan view, the first lower via is overlapped with the second upper metal line, and the second lower via is overlapped with the first upper metal line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.