Fan-out semiconductor package
US10026703B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2017 |
| Grant date | Jul 17, 2018 |
| Priority date | — |
| Expiry date | Aug 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface disposed to oppose the active surface; a dummy chip disposed in the through-hole and spaced apart from the semiconductor chip; a second connection member disposed on the first connection member, the dummy chip, and the active surface of the semiconductor chip; and an encapsulant encapsulating at least portions of the first connection member, the dummy chip, and the inactive surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.