Circuits for on-situ differential impedance balance error measurement and correction
US10027447B2 · kind B2 · utility
1Cited by
2References
20Claims
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Key dates
| Filing date | Aug 9, 2017 |
| Grant date | Jul 17, 2018 |
| Priority date | — |
| Expiry date | Aug 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Circuits are used to sense and compensate or mitigate the imbalance errors, hence restoring the intended benefits of differential processing. In particular, the impedance mismatch between the positive and negative branches of a balanced system is sensed by digitizing an error voltage developed by injecting suitable common mode stimuli. The mismatch is then trimmed out by introducing and properly setting up a digitally controlled impedance that counters the original impedance mismatch and hence rebalances the signal path on-situ and prior to exercising the signal processing chain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.