Read voltage determination in a memory device
US10031699B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2017 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | Oct 18, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/349
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technology for a system operable to write and read data from memory is described. The system can include memory and a memory controller. The memory controller can send an instruction to write data to a NVM address in the memory at a time of last write (TOLW). The memory controller can determine to read the data from the NVM address in the memory at read time. The memory controller can determine a read voltage to read the data from the NVM address in the memory at the read time. The read voltage can be determined based on a difference between the TOLW and the read time, and a modeled voltage drift for the NVM address over a period of time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.