Memory protection unit, memory management unit, and microcontroller
US10031862B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2016 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | Nov 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1052
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory protection unit including hardware registers for entering address tables, a configuration memory for storing the address tables, a preconfigured hardware logic for managing the configuration memory, a data connection between the configuration memory and the hardware logic for loading the hardware registers, a first interface for controlling the loading by a computing core, and a second interface for writing to the configuration memory by the computing core.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.