VDMOS transistors, BCD devices including VDMOS transistors, and methods for fabricating integrated circuits with such devices
US10032766B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2016 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | Oct 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0142
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
VDMOS transistors, Bipolar-CMOS-DMOS (BCD) devices including VDMOS transistors, and methods for fabricating integrated circuits with such devices are provided. In an example, a BCD device having a VDMOS transistor includes a buried layer over a substrate and an epitaxial layer over the buried layer and having an upper surface. Deep trench isolation regions extend from the upper surface of the epitaxial layer, into the substrate, and isolate a VDMOS region from a device region. In the VDMOS region, a source region is adjacent the upper surface, a vertical gate structure extends into the epitaxial layer, a body region is located adjacent the vertical gate structure and forms a channel, and a VDMOS conductive structure extends through the epitaxial layer and into the buried layer, which is a drain for the VDMOS transistor. The VDMOS conductive structure is a drain contact to the buried layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.