Mask, manufacturing method thereof and exposure system
US10032881B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 25, 2016 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | Mar 25, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A mask, including a transparent substrate and mask patterns formed on a surface of the transparent substrate, wherein the mask patterns include a first area for forming film patterns in a display area and a second area for forming film patterns in a non-display area; both the first area and the second area are provided with a plurality of patterned sub-masks; a distribution density of the patterned sub-masks in the first area is less than a distribution density of the patterned sub-masks in the second area; each patterned sub-mask includes a first pattern for forming a source electrode of a transistor, a second pattern for forming a drain electrode of the transistor, and a slit interposed between the first pattern and the second pattern; and a width of the slit in the first area is greater than a width of the slit in the second area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.