Power control current sharing circuit
US10033195B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 4, 2015 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | May 25, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J1/106
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A load balancing circuit comprising a first power source, a first field effect transistor (FET) device having a drain terminal connected to the first power source and a source terminal connected to a first node, a first resistor connected to the first node and a second node, a load connected to the second node, a second FET device having a drain terminal connected to the first node and a source terminal connected to the second node, a third FET device having a collector terminal connected to a gate terminal of the first FET device and an emitter terminal connected to the second node, and a second resistor connected to a base terminal of the third FET device and the first node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.