FINFET based driver circuit
US10033384B2 · kind B2 · utility
0Cited by
11References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2017 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | Oct 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a driver circuit including a first group of transistors provided between first and second nodes and including n of the transistor(s) where n is equal to or greater than one, and a second group of transistors provided in parallel with the first group of transistors and including m of the transistor(s) where m is equal to or greater than one and not equal to n, the m transistors being connected together in series. The n-channel transistor in the first group and at least one of the two n-channel transistors in the second group have their gate connected to an input node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.