Patent · US Active

Display panel and a manufacturing method thereof, a TFT test method

US10036906B2 · kind B2 · utility

0Cited by
0References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 15, 2016
Grant dateJul 31, 2018
Priority date
Expiry dateApr 15, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10K59/1201
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

A display panel which includes a display area and a peripheral area around the display area is provided. The peripheral area includes an electroluminescent layer test region, a TFT test region and a plurality of lead-out lines. The electroluminescent layer test region includes a plurality of thin film transistors having electroluminescent layers, a first test line connecting sources of the plurality of thin film transistors having electroluminescent layers, and a switch lead and a second test line connecting gates of the plurality of thin film transistors having electroluminescent layers. The TFT test region includes a plurality of thin film transistors. Each of the plurality of lead-out lines is used for connecting a source-drain metal layer of one thin film transistor in the electroluminescent layer test region and a source-drain metal layer of one thin film transistor in the TFT test region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.