Underfill stop using via bars in semiconductor packages
US10037900B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2017 |
| Grant date | Jul 31, 2018 |
| Priority date | — |
| Expiry date | May 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15151
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device is disclosed. The device includes a baseboard including a first set of metallic contact pads, a semiconductor integrated chip (IC) package including a second set of metallic contact pads and metallic interconnects to connect the first set of metallic contacts pads and the second set of metallic contact pads through metallic interconnects. The second set of metallic contact pads includes a first group of contact pads and a second group of contact pads. The first group of contact pads are designed to carry a high frequency signal. The baseboard includes a plurality of holes that at least partially segregates a first group of metallic interconnects that connects the first group of contact pads to the baseboard and a second group of metallic interconnects that connects the second group of contact pads to the baseboard.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.