Surface-mountable multi-chip component
US10037979B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 30, 2015 |
| Grant date | Jul 31, 2018 |
| Priority date | — |
| Expiry date | Jan 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A surface-mountable multi-chip component includes a carrier having a first connection element, a second connection element and third connection element that are electrically insulated from one another. A first semiconductor chip is arranged on the first connection element and electrically connected to the first and second connection elements. The first connection element forms a first electrode and the second connection element forms a second electrode for the first semiconductor chip. A second semiconductor chip is arranged on the second connection element and electrically connected to the second and third connection elements. The third connection element forms a first electrode and the second connection element forms a second electrode for the second semiconductor chip. The second connection element forms a common cathode or anode for the first and second semiconductor chips during operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.