Power amplifier matching circuit with DVCs
US10038415B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 23, 2015 |
| Grant date | Jul 31, 2018 |
| Priority date | — |
| Expiry date | Sep 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2007/013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments disclosed herein generally relate to power amplifier matching circuits used for matching impedance and harmonic control in a device, such as a cellular phone. In one example, a power amplifier matching circuit includes two DVCs, four inductors, a transistor, and a capacitor. Utilizing the two DVCs, the impedance matching ratio and the center frequency of the circuit are capable of adjustment as needed. Moreover, the inclusion of the two DVCs may also prevent harmonic frequencies from undesirably passing through the power amplifier matching circuit to the antenna of a cellular device. The power amplifier matching circuit may be used in conjunction with an amplifier, where the output of the amplifier is proportional to the current in the circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.