Equalizer boost setting
US10038577B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2016 |
| Grant date | Jul 31, 2018 |
| Priority date | — |
| Expiry date | Dec 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03745
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
One example includes a system that is comprised of an equalizer, a counter, and a controller. The equalizer equalizes an incoming signal and provide an equalized output signal over a plurality of time intervals according to a given equalizer setting thereof. The counter provides a count value to represent to a number of times that the equalized output signal crosses each of a plurality of thresholds over the plurality of time intervals. The controller evaluates the count value for each of the plurality of thresholds at each of a plurality of equalizer settings and configures the equalizer setting based on the evaluation of the count values for each of the equalizer settings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.