System and methods for computer clock synchronization without frequency error estimation
US10042384B2 · kind B2 · utility
1Cited by
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14Claims
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Key dates
| Filing date | Sep 16, 2014 |
| Grant date | Aug 7, 2018 |
| Priority date | — |
| Expiry date | Jan 24, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/16
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A clock synchronization system and methods including an algorithm, or protocol, that synchronizes to any source of time without the need of estimating frequency errors and only performing frequency adaptions. Specifically, a clock synchronization protocol synchronizes networked nodes without explicit estimation of the clock skews and steep corrections on the time. The algorithm is guaranteed to converge even in the presence of timing loops which allow different clients to share timing information and even collectively outperform individual clients when the time source has large jitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.