Fan-out semiconductor package
US10043758B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2017 |
| Grant date | Aug 7, 2018 |
| Priority date | — |
| Expiry date | Aug 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19106
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fan-out semiconductor package includes: a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the semiconductor chip; and a connection member disposed on the active surface of the semiconductor chip. The connection member includes a plurality of insulating layers, a plurality of redistribution layers disposed on the plurality of insulating layers, respectively, and a plurality of via layers penetrating through the plurality of insulating layers, respectively, and at least two of the plurality of insulating layers or at least two of the plurality of via layers have different thicknesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.