Memory circuit with a bistable circuit and a non-volatile element
US10049740B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 6, 2015 |
| Grant date | Aug 14, 2018 |
| Priority date | — |
| Expiry date | Aug 6, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory circuit includes: cells arranged in rows and columns so that the rows are grouped to form banks each including one or more rows, each cell including: a bistable circuit storing data; and a non-volatile element storing data stored in the bistable circuit in a non-volatile manner and restoring data stored in a non-volatile manner to the bistable circuit; and a controller that performs a store operation on each row in turn; sets a voltage supplied, as a power-supply voltage, to cells in a first bank, which includes a row on which the store operation is performed, of the banks to a first voltage; and sets a voltage supplied, as a power-supply voltage, to cells in a bank of the banks other than the first bank to a second voltage that is less than the first voltage but at which data in the bistable circuit is retained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.