Electron gas confinement heterojunction transistor
US10050112B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 3, 2017 |
| Grant date | Aug 14, 2018 |
| Priority date | — |
| Expiry date | Feb 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A high electron mobility heterojunction transistor, including a first GaN layer; a second, p-doped GaN layer on top of the first layer, including magnesium as a p-type dopant, the concentration of which is at least equal to 5*1016 cm−3 and at most equal to 2*1018 cm−3, the thickness of the second GaN layer being between 20 and 50 nm; a third, n-doped GaN layer on top of the second GaN layer in order to form a depleted p-n junction; a fourth GaN layer, which is not intentionally doped, on top of the third GaN layer; a semiconductor layer plumb with the fourth GaN layer, which is not intentionally doped, in order to form an electron gas layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.