Resistive random access memory device having nano-scale tip and nanowire, memory array using the same and fabrication method thereof
US10050195B2 · kind B2 · utility
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Key dates
| Filing date | Feb 20, 2018 |
| Grant date | Aug 14, 2018 |
| Priority date | — |
| Expiry date | Feb 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/826
Abstract
A resistive random access memory device having a nano-scale tip and a nanowire is provided. A memory array using the same also is provided and fabrication method thereof. A technique is provided for forming a bottom electrode having an upwardly protruding tapered tip structure through etching a semiconductor substrate and a top electrode being formed of a nanowire and a technique forming a resistive random access memory device at a location intersected with each other in order that an area of each memory cell is minimized and that an electric field is focused on the tip of the bottom electrode across the top electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.