Patent · US Active

Three-level inverter switching

US10050561B2 · kind B2 · utility

0Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 30, 2016
Grant dateAug 14, 2018
Priority date
Expiry dateDec 30, 2036

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02B70/10
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

Inverter circuit operation for managing power factor changes is provided. Various modes of switch timing may be employed near zero-voltage crossings. Inverter switch timing may change during a cycle such that one timing strategy is employed approaching or leaving a zero-voltage crossing while another timing strategy is employed at other times of the cycle.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.