Patent · US Active

Extending a virtual machine instruction set architecture

US10055208B2 · kind B2 · utility

1Cited by
9References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 25, 2016
Grant dateAug 21, 2018
Priority date
Expiry dateJan 25, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F8/437
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Operations include a compilation process and a runtime process. A compiler compiles code to generate virtual machine instructions. The compiler further generates information referencing respective parameter types of the parameters of a target virtual machine instruction. The compiler stores the information external to and in association with the target virtual machine instruction. The information may be included in another virtual machine instruction that precedes the target virtual machine instruction. A runtime environment processes the target virtual machine instruction based on the information stored external to and in association with the target virtual machine instruction. Parameter types referenced by the external information override parameter types that are (a) referenced by the target virtual machine instruction itself, (b) deduced by the runtime environment and/or (c) stored directly in association with the parameter values.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.