Performance optimization of hardware accelerators
US10055255B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2016 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Jun 30, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5044
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Example embodiments of the present disclosure provide methods and devices for optimizing performance of hardware accelerators. The accelerator device may detect status information of a current acceleration task being executed. The detected status information is provided to a host associated with the accelerator device. The host makes preparation for a subsequent acceleration task based on the status information before termination of the current running acceleration task. The accelerator device may execute the subsequent acceleration task based on the preparation. In this way, the performance of hardware accelerator is optimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.